Department of Electrical Engineering (ISY)

SoCBUS: SoC interconnection network-on-chip

Daniel Wiklund, Andreas Ehliar, and Dake Liu)

Introduction

The goals of this project is to develop a platform for SoC integration in environments where hard real-time is of essence. Typical application areas are baseband processing in radio communications and communication infrastructure systems. The basis of the platform is an on-chip network (SoCBUS) which is described in more detail below.

Further investigations are done in the field of integration of multiple heterogeneous processors/processing elements for power- and time-efficient implementations of various tasks in communications.

Another important aspect of the integration flow is the ability to schedule the overall system in an efficient and appropriate manner. Research on this issue is conducted in cooperation with another research group at the university.

SoCBUS network

The basis of the platform is an on-chip network (SoCBUS). This network has been developed with simplicity and compactness in mind. The network is circuit switched with a packet-based setup procedure. Each core connects to the network through a network interface (i.e. wrapper) that in turn is connected to a network router. The network components do not in any way limit the possible network topology. Figure 1 shows a small two-dimensional network.

Figure 1: Typical 2-d mesh SoCBUS network.

SoCBUS simulations

A simulator dedicated to on-chip networks has been developed. This simulator takes a set of XML descriptions as input and creates a performance report based on the simulation run.

Figure 2: Throughput for a 3-d torus network.

Figure 2 shows the results from a set of simulations. The network used is an uniform 8 by 8 mesh with random traffic. The z-axis shows througput as a function of varying packet size and traffic intensity.

FPGA considerations

We are investigating ways to implement SoCBUS on FPGAs with the goal of minimizing size and latency while maximizing bandwidth. We are also comparing the SoCBUS architecture with other FPGA optimized NoC architectures including a packet switched architecture which is available for download.

Publications

Daniel Wiklund, Andreas Ehliar, and Dake Liu
Design of an Internet core router using the SoCBUS network on chip
Proc of the International Symposium on Signals, Circuits, and Systems (ISSCS), Iasi, Romania, July 2005

Daniel Wiklund and Dake Liu
Design, mapping, and simulations of a 3G WCDMA/FDD basestation using network on chip
Proc of the International workshop on SoC for real-time applications, Banff, Canada, July 2005

Daniel Wiklund
Development and Performance Evaluation of Networks on Chip
Ph.D. thesis, Linköping Studies in Science and Technology, Dissertation No. 932, Linköpings universitet, Apr 2005

Daniel Wiklund, Sumant Sathe, and Dake Liu
Network on chip simulations for benchmarking
Proc of the International workshop on SoC for real-time applications, Banff, Canada, July 2004

Sumant Sathe, Daniel Wiklund, and Dake Liu
Design of a switching node (router) for on-chip networks
Proc of Int'l conference on ASIC (ASICON), Beijing, China, Oct 2003

Daniel Wiklund and Dake Liu
SoCBUS: Switched Network on Chip for Hard Real Time Systems
Proc of the International Parallel and Distributed Processing Symposium (IPDPS), Nice, France, Apr 2003

Tomas Henriksson, Daniel Wiklund, and Dake Liu
VLSI implementation of a switch for on-chip networks
Proc of Int'l workshop on Design and diagnostics of electronic circuits and systems (DDECS), Poznan, Poland, Apr 2003

Daniel Wiklund
An on-chip network architecture for hard real time systems
Linköping Studies in Science and Technology, Thesis No. 996, Linköping, Sweden, Jan 2003

Daniel Wiklund and Dake Liu
Design of a system-on-chip switched network and its design support
Proc of the Int'l conference of communications, circuits and systems, Chengdu, China, June 2002

Daniel Wiklund and Dake Liu
Switched interconnect for system-on-a-chip designs
Proc of the IP2000 Europe conference, Edinburgh, Scotland, Oct 2000