Responsible for this page: Dake Liu , dake@isy.liu.se
Page last update: 2007-01-22

[ Go to content ] [ Help ] [ Information about accessability ]
På svenska | A to Z Maps Web overview Contact us
Go to LiU.se
LiU - ISY > Computer Engineering > Undergrad education

Master Thesis Project

Development of NoGAP a Novel Generator of Micro Architecture and Processor Framework

(one or two student(s))

Supervisor: Per Karlström
Examiner: Dake Liu

Introduction

The tape out of a new processor is usually the result of a substantial design effort, however by choosing the correct tools the design effort can be eased. When designing a new processor, either a low level RTL such as Verilog or VHDL or some tool aimed at processor construction using a higher level description language can be used. Both approaches have their advantages and disadvantages, RTLs offers design freedom but the freedom does not come for free. Design times are increased due to micro management of many small details, which is an error prone and tedious task requiring substantial verification. The other approach, using a tool made for processor construction has the obvious advantage of hiding complexity but hiding complexity makes it impossible to work with the details if needed. Designers then get limited to the architectures supported by the tool.

The NoGAP project aims to develop a new framework for processor construction. Striking a balance between design freedom and abstraction for micro architecture design. NoGAP has been under development for some time and is now a semi stable tool, more research and work is however needed to make it even better.

NoGAP Overview

NoGAP takes the form of a tool chain starting from one of many possible higher level description languages called a facet continuing to a common compiler and ending in a set of other tools, called spawners, producing the actual useful product, this is roughly depicted in the figure below.



Possible Thesis Projects

As NoGAP is a fairly large project there is a number of possible areas to work in, ranging from pure software implementations (C++) to pure hardware implementations, or projects where you can use both your hardware and software knowledge.

Since NoGAP is in active development and research your thesis project might involve research oriented tasks where your creativity and ingenuity is the driving force instead of a predefined set of requirements.

We are offering both 15hp and 30hp projects. 15hp projects are targeted more at solving specific problems. 30hp project will have more of a research characteristic.

Listed here are just a few of the possible thesis projects that can be offered within the NoGAP project. If you are interested but can not find any project that you think suites you. Do not hesitate to contact Per Karlström.

30hp Projects
  • Parametrization: Develop and integrate the possibility to use parameterizable hardware units in NoGAP.
  • Register forwarding: Investigate how to specify register forwarding and automate register forwarding insertion.
  • Simulator refinement: Refine the current simulator generator implementation.
  • Incremental compilation of NoGAP-CL: Develop a method to allow for incremental compilation of NoGAP modules
  • Test platform development: Develop and refine the hardware test platform used for easy testing of NoGAP generated hardware
15hp Projects
  • Better build system: Look into alternative build systems and evaluate if any of the existing build systems are better than the one currently used.
  • Symbolic math library: Continue to develop a symbolic math library for NoGAP in C++.
  • Better error reporting: Look into and develop a good error reporting system so that NoGAP will be easier to use.