Informationsansvarig: Dake Liu , dake@isy.liu.se
Sidan uppdaterades senast: 2010-09-15
Informationsansvarig: Dake Liu , dake@isy.liu.se
Sidan uppdaterades senast: 2010-09-15
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In contrast to general purpose microprocessors, ASIP and multi-core ASIP give much higher performance, lower power, and lower silicon costs because of the optimized application specific instruction set and microarchitecture for an application domain.
ASIP research is a challenging area. The required knowledge for ASIP research is broad, ranging from applications, architecture selection, code compiling, parallel programming, microarchitecture, down to silicon fabrication.
embedded Parallel DSP platform with Unique Memory Access
(Dake, Jian, Joar, Olof, Andreas K, Andreas E) To design a parallel DSP processor platform for markets in 2020
Novel Generator of Accelerators and Processors
(Per, Wenbiao, and Dake) To design a processor synthesizer to generate RTL codes, assembler, simulator, and compiler without template constriantis of an instruction set
an EU project of FP7 with Infineon, Ericsson, Lund University, TU-Leuven, and IMEC
(Andreas E. Di, Johan, Rizwan, Guoyou, and Dake) To design a programmable platform for radio baseband signal processing of future mobile handset
(Andreas E. and Dake) To establish methods for ASIP and FPGA co-design and support FPGA fast prototyping of ASIC design
C-source code profilier for ASIP design
(Dake) To design a tool to speed up understanding of execution behaviors of applications.
A SIMD processor for forward error correction
(Ali and Dake) To design an silicon efficient programmable FEC supporting Viterbi, Turbo, RS, and LDPC.
Sequential COde ParallElization
(Lan and Dake) To design hardware acceleration on instruction level for searching and sorting.
(Dake and Andreas) A DSP platform for functional acceleration.
